yosys
https://github.com/cliffordwolf/yosys
C++
Yosys Open SYnthesis Suite
Triage Issues!
When you volunteer to triage issues, you'll receive an email each day with a link to an open issue that needs help in this project. You'll also receive instructions on how to triage issues.
Triage Docs!
Receive a documented method or class from your favorite GitHub repos in your inbox every day. If you're really pro, receive undocumented methods or classes and supercharge your commit history.
C++ not yet supported3 Subscribers
Add a CodeTriage badge to yosys
Help out
- Issues
- Spurious warnings "select out of bounds on signal" when there is no such thing ...
- write_smt2: "-wires" option leads to inequivalent descriptions
- opt: no "-purge" option but public names removed
- Should -nomx8 be the default for the GateMate?
- synth_* passes should call `check -mapped`
- "ERROR: Assert `count_id(wire->name) == 0' failed in kernel/rtlil.cc:2143" when using synth_{ice40,ecp5} on simple design
- Another out-of-memory problem with for loop
- ABC: read_lib args and placeholders
- Assertion Failure in AST Processing: node->bits == v at frontends/ast/ast.cc:855
- drivertools: Utility code for indexing and traversing signal drivers
- Docs
- C++ not yet supported